? semiconductor components industries, llc, 2005 december, 2005 ? rev. 2 1 publication order number: mac15m/d mac15m, mac15n preferred device triacs silicon bidirectional thyristors designed for high performance full-wave ac control applications where high noise immunity and high commutating di/dt are required. features ? blocking voltage to 800 volts ? on-state current rating of 15 amperes rms at 80 c ? uniform gate trigger currents in three modes ? high immunity to dv/dt ? 250 v/ s minimum at 125 c ? minimizes snubber networks for protection ? industry standard to-220ab package ? high commutating di/dt ? 9.0 a/ms minimum at 125 c ? operational in three quadrants, q1, q2, and q3 ? pb?free packages are available* maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive off?state voltage (note 1) (?40 to 125 c, sine wave, 50 to 60 hz, gate open) mac15m mac15n v drm, v rrm 600 800 v on?state rms current (full cycle sine wave, 60 hz, t c = 80 c) i t(rms) 15 a peak non-repetitive surge current (one full cycle sine wave, 60 hz, t j = 125 c) i tsm 150 a circuit fusing consideration (t = 8.3 ms) i 2 t 93 a 2 s peak gate power (pulse width 1.0 s, t c = 80 c) p gm 20 w average gate power (t = 8.3 ms, t c = 80 c) p g(av) 0.5 w operating junction temperature range t j ?40 to +125 c storage temperature range t stg ?40 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. v drm and v rrm for all types can be applied on a continuous basis. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. triacs 15 amperes rms 600 thru 800 volts to?220ab case 221a?09 style 4 1 http://onsemi.com mac15xg ayww marking diagram x = m or n a = assembly location y = year ww = work week g = pb?free package 2 3 device package shipping ordering information mac15m to?220ab 50 units / rail mac15n to?220ab 50 units / rail mac15mg to?220ab (pb?free) 50 units / rail MAC15NG to?220ab (pb?free) 50 units / rail mt1 g mt2 pin assignment 1 2 3 gate main terminal 1 main terminal 2 4 main terminal 2 preferred devices are recommended choices for future use and best overall value.
mac15m, mac15n http://onsemi.com 2 thermal characteristics characteristic symbol value unit thermal resistance, junction?to?case thermal resistance junction?to?ambient r jc r ja 2.0 62.5 c/w maximum lead temperature for soldering purposes 1/8 from case for 10 seconds t l 260 c electrical characteristics (t j = 25 c unless otherwise noted; electricals apply in both directions) characteristic symbol min typ max unit off characteristics peak repetitive blocking current (v d = rated v drm , v rrm ; gate open) t j = 25 c t j = 125 c i drm , i rrm ? ? ? ? 0.01 2.0 ma on characteristics peak on-state voltage (note 2) (i tm = 21 a peak) v tm ? 1.2 1.6 v gate trigger current (continuous dc) (v d = 12 v, r l = 100 ) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) i gt 5.0 5.0 5.0 13 16 18 35 35 35 ma hold current (v d = 12 vdc, gate open, initiating current = 150 ma) i h ? 20 40 ma latching current (v d = 24 v, i g = 35 ma) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) i l ? ? ? 33 36 33 50 80 50 ma gate trigger voltage (v d = 12 v, r l = 100 ) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) v gt 0.5 0.5 0.5 0.75 0.72 0.82 1.5 1.5 1.5 v dynamic characteristics rate of change of commutating current; see figure 10. (v d = 400 v, i tm = 6.0 a, commutating dv/dt = 24 v/ s, c l = 10 f gate open, t j = 125 c, f = 250 hz, no snubber) l l = 40 mh (di/dt) c 9.0 ? ? a/ms critical rate of rise of off-state voltage (v d = rated v drm , exponential waveform, gate open, t j = 125 c) dv/dt 250 ? ? v/ s 2. pulse test: pulse width 2.0 ms, duty cycle 2%.
mac15m, mac15n http://onsemi.com 3 + current + voltage v tm i h symbol parameter v drm peak repetitive forward off state voltage i drm peak forward blocking current v rrm peak repetitive reverse off state voltage i rrm peak reverse blocking current voltage current characteristic of triacs (bidirectional device) i drm at v drm on state off state i rrm at v rrm quadrant 1 mainterminal 2 + quadrant 3 mainterminal 2 ? v tm i h v tm maximum on state voltage i h holding current mt1 (+) i gt gate (+) mt2 ref mt1 (?) i gt gate (+) mt2 ref mt1 (+) i gt gate (?) mt2 ref mt1 (?) i gt gate (?) mt2 ref ? mt2 negative (negative half cycle) mt2 positive (positive half cycle) + quadrant iii quadrant iv quadrant ii quadrant i quadrant definitions for a triac i gt ? + i gt all polarities are referenced to mt1. with in?phase signals (using standard ac lines) quadrants i and iii are used.
mac15m, mac15n http://onsemi.com 4 i t(rms) , rms on-state current (amp) 125 120 115 110 105 100 95 90 85 80 16 14 12 10 8 6 4 2 0 t c , case temperature ( c) i t(rms) , on-state current (amp) 16 14 12 10 8 6 4 2 0 20 18 16 14 12 10 8 6 4 2 p av , average power (watts) 0 dc = 30 and 60 = 90 = 120 = 180 dc 180 120 90 60 = 30 v t , instantaneous on-state voltage (volts) 100 0 i t , instantaneous on-state current (amp) 0.5 1 1.5 2 2.5 3 3.5 4 10 1 0.1 maximum @ t j = 125 c typical at t j = 25 c maximum @ t j = 25 c t, time (ms) r(t), transient thermal resistance(normalized) 1 0.1 0.01 110 4 1000 100 10 1 0.1 t j , junction temperature ( c) ?40 i h , hold current (ma) 40 5 ?10 20 50 80 110 125 mt2 positive mt2 negative figure 1. rms current derating figure 2. on?state power dissipation figure 3. on?state characteristics figure 4. transient thermal response figure 5. hold current variation
mac15m, mac15n http://onsemi.com 5 t j , junction temperature ( c) t j , junction temperature ( c) i gt , gate trigger current (ma) v gt , gate trigger voltage (volt) ?40 ?10 20 50 80 110 125 100 1 q3 q1 q2 off-state voltage = 12 v r l = 140 1 0.5 ?40 ?10 +20 50 80 110 125 q1 q2 q3 off-state voltage = 12 v r l = 140 r g , gate to main terminal 1 resistance (ohms) 5000 4k 3k 2k 1k 0 10000 1000 100 10 dv/dt , critical rate of rise of off-state voltage (di/dt) c , rate of change of commutating current (a/ms) (v/ s) v d = 800 vpk t j = 125 c i tm t w v drm (di/dt) c = 6f i tm 1000 f = 1 2 t w t j = 125 c 100 c 75 c 10 100 100 10 1 (dv/dt) , critical rate of rise of (v/ s) c commutating voltage 20 30 40 50 60 70 80 90 figure 6. typical holding current versus junction temperature figure 7. gate trigger voltage versus junction temperature figure 8. critical rate of rise of off?state voltage (exponential) figure 9. critical rate of rise of commutating voltage figure 10. simplified test circuit to measure the critical rate of rise of commutating current (di/dt) c l l 1n4007 200 v + measure i ? charge control charge trigger non-polar c l 51 mt2 mt1 1n914 g trigger control 200 v rms adjust for i tm , 60 hz v ac note: component values are for verification of rated (di/dt) c . see an1048 for additional information.
mac15m, mac15n http://onsemi.com 6 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. style 4: pin 1. main terminal 1 2. main terminal 2 3. gate 4. main terminal 2 dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 ??? 1.15 ??? z ??? 0.080 ??? 2.04 b q h z l v g n a k f 123 4 d seating plane ?t? c s t u r j to?220ab case 221a?09 issue aa on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mac15m/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
|
